TLB's Are Typically Built to Be Fully-Associative or Highly Set-Associative

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The Answer is TLB's cache the translation from a virtual page number to a physical page number. Since
(a) a page size is much larger than a normal cache line size, there is likely to very less spatial locality amongst the virtual address accesses from a single process than between successive memory blocks.
(b) Different processes have their own virtual address space and hence to prevent a lot of conflict misses to ensure TLBs don't become a source of unfairness as far as a process's memory access is concerned, they are designed to be fully associative.

TLB's Are Typically Built to Be Fully-Associative or Highly Set-Associative

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